The invention relates generally to digital demodulators and, more specifically, to digital demodulators that recover data conveyed in a stream of symbols within a received wireless signal.
In a wireless, digital communication system, a transmitter modulates a stream of data and transmits the modulated signal to a receiver. The transmitter modulates the data by converting it to symbols, where a symbol is a discrete interval of time within which the transmitted signal conveys a unit of data (i.e., one or more bits) in the form of a magnitude and a phase. The transmitter modulates the data based on a symbol clock, which is local to the transmitter, where the symbol clock rate is some fraction of the data rate.
Upon receipt, a receiver recovers the data by demodulating the received signal. Many of the receiver""s demodulation elements (e.g., the carrier loop, unique word detector, interleavers, data decision modules, and Viterbi decoders) are clocked using the receiver""s symbol clock. The receiver""s symbol clock and the transmitter""s symbol clock are separate. Therefore, the phases and the frequencies of the transmitted symbols and the received symbols usually are slightly different.
In addition, in some systems, the transmitted signals are prone to significant frequency offsets, such as offsets caused by Doppler shifts. For example, in a satellite communication system where the satellites move with respect to ground-based transmitters, Doppler shifts can substantially offset the frequency of signals transmitted by ground devices to the satellites, and vice versa.
Symbol synchronization involves compensating for frequency and phase offsets imposed upon the signals between the transmitter and the receiver. Some prior art systems address the frequency and phase offset problems using some type of phase locked loop (PLL) circuit. In these systems, a voltage controlled oscillator (VCO) is employed to modify the sampling rate of the received signal, where the sampling rate is controlled by a sampling clock at the receiver. In addition, the output of an interpolation filter, which is used to resample the incoming data, is controlled by a symbol clock that is phase locked to the received data stream.
In some cases, however, it may be undesirable to use a VCO in the synchronization loop. One reason is that a VCO generally produces harmonics, which may interfere with other system components. If a VCO is undesirable, the symbol clock may instead be derived directly from a sampling clock using a simple state machine. The resulting clock rate will have an average frequency equal to the symbol rate, but a non-uniform duty cycle. One drawback to this solution, however, is that both the sampling clock and the symbol clock are fixed in frequency and cannot be adjusted to track the frequency of an incoming Doppler shifted signal. This solution, therefore, is not adequate when received signals are susceptible to Doppler shifts.
What are needed are apparatus and methods that provide accurate symbol synchronization in the presence of significant frequency offsets. Particularly needed are apparatus and methods that enable a receiver, which receives Doppler shifted signals, to demodulate received symbols without the use of a VCO.